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Merged
merged 1 commit into from
Oct 28, 2024
Merged

[LLD][COFF] Add Support for ARM64EC pseudo relocations #113832

merged 1 commit into from
Oct 28, 2024

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@cjacek cjacek commented Oct 27, 2024

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@cjacek cjacek requested a review from mstorsjo October 27, 2024 19:31
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llvmbot commented Oct 27, 2024 •
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@llvm/pr-subscribers-platform-windows

@llvm/pr-subscribers-lld-coff

Author: Jacek Caban (cjacek)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/113832.diff

2 Files Affected:

  • (modified) lld/COFF/Chunks.cpp (+7-9)
  • (added) lld/test/COFF/autoimport-arm64ec-data.test (+56)
diff --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index c6986681dffe77..33fb20ffeaf321 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -570,8 +570,7 @@ void SectionChunk::getBaserels(std::vector<Baserel> *res) {
 // another DLL) This returns the size the relocation is supposed to update,
 // in bits, or 0 if the relocation cannot be handled as a runtime pseudo
 // relocation.
-static int getRuntimePseudoRelocSize(uint16_t type,
-                                     llvm::COFF::MachineTypes machine) {
+static int getRuntimePseudoRelocSize(uint16_t type, Triple::ArchType arch) {
   // Relocations that either contain an absolute address, or a plain
   // relative offset, since the runtime pseudo reloc implementation
   // adds 8/16/32/64 bit values to a memory address.
@@ -597,8 +596,8 @@ static int getRuntimePseudoRelocSize(uint16_t type,
   // the image, or temporarily changed at runtime with VirtualProtect.
   // Since this only operates on direct address values, it doesn't work for
   // ARM/ARM64 relocations, other than the plain ADDR32/ADDR64 relocations.
-  switch (machine) {
-  case AMD64:
+  switch (arch) {
+  case Triple::x86_64:
     switch (type) {
     case IMAGE_REL_AMD64_ADDR64:
       return 64;
@@ -613,7 +612,7 @@ static int getRuntimePseudoRelocSize(uint16_t type,
     default:
       return 0;
     }
-  case I386:
+  case Triple::x86:
     switch (type) {
     case IMAGE_REL_I386_DIR32:
     case IMAGE_REL_I386_REL32:
@@ -621,14 +620,14 @@ static int getRuntimePseudoRelocSize(uint16_t type,
     default:
       return 0;
     }
-  case ARMNT:
+  case Triple::thumb:
     switch (type) {
     case IMAGE_REL_ARM_ADDR32:
       return 32;
     default:
       return 0;
     }
-  case ARM64:
+  case Triple::aarch64:
     switch (type) {
     case IMAGE_REL_ARM64_ADDR64:
       return 64;
@@ -661,8 +660,7 @@ void SectionChunk::getRuntimePseudoRelocs(
     // alive. Thus such dangling references in DWARF sections are expected.
     if (!target->getChunk())
       continue;
-    int sizeInBits =
-        getRuntimePseudoRelocSize(rel.Type, file->ctx.config.machine);
+    int sizeInBits = getRuntimePseudoRelocSize(rel.Type, getArch());
     if (sizeInBits == 0) {
       error("unable to automatically import from " + target->getName() +
             " with relocation type " +
diff --git a/lld/test/COFF/autoimport-arm64ec-data.test b/lld/test/COFF/autoimport-arm64ec-data.test
new file mode 100644
index 00000000000000..4d71b55f651a65
--- /dev/null
+++ b/lld/test/COFF/autoimport-arm64ec-data.test
@@ -0,0 +1,56 @@
+# REQUIRES: aarch64, x86
+RUN: split-file %s %t.dir && cd %t.dir
+
+RUN: llvm-lib -machine:arm64ec -out:libtest.a -def:test.def
+RUN: llvm-mc -triple=arm64ec-windows-gnu arm64ec.s -filetype=obj -o arm64ec.obj
+RUN: llvm-mc -triple=arm64ec-windows-gnu x86_64.s -filetype=obj -o x86_64.obj
+
+RUN: lld-link -machine:arm64ec -out:out.dll -dll -noentry x86_64.obj arm64ec.obj libtest.a -lldmingw
+
+RUN: llvm-readobj --coff-imports out.dll | FileCheck -check-prefix=IMPORTS %s
+RUN: llvm-objdump -s out.dll | FileCheck --check-prefix=CONTENTS %s
+
+IMPORTS:      Import {
+IMPORTS-NEXT:   Name: test.dll
+IMPORTS-NEXT:   ImportLookupTableRVA: 0x40E0
+IMPORTS-NEXT:   ImportAddressTableRVA: 0x3000
+IMPORTS-NEXT:   Symbol: variable (0)
+IMPORTS-NEXT: }
+
+Runtime pseudo relocation list header at 0x401c, consisting of 0x0, 0x0, 0x1.
+The first runtime pseudo relocation is from an x86_64 object file, with import
+from 0x3000, applied at 0x7000 with a size of 32 bits. The second pseudo
+relocation is from an ARM64EC object file, with import from 0x3000, applied
+at 0x7008 with a size of 32 bits.
+
+CONTENTS: Contents of section .rdata:
+CONTENTS:  180004010 00200000 10200000 00200000 00000000
+CONTENTS:  180004020 00000000 01000000 00300000 00700000
+CONTENTS:  180004030 40000000 00300000 08700000 40000000
+
+CONTENTS:      Contents of section .test:
+CONTENTS-NEXT:  180007000 00300080 01000000 00300080 01000000
+CONTENTS-NEXT:  180007010 1c400080 01000000 40400080 01000000
+
+#--- arm64ec.s
+    .text
+    .global "#_pei386_runtime_relocator"
+"#_pei386_runtime_relocator":
+    ret
+
+    .weak_anti_dep _pei386_runtime_relocator
+.set _pei386_runtime_relocator,"#_pei386_runtime_relocator"
+
+    .section .test,"dr"
+    .quad variable
+    .quad __RUNTIME_PSEUDO_RELOC_LIST__
+    .quad __RUNTIME_PSEUDO_RELOC_LIST_END__
+
+#--- x86_64.s
+    .section .test,"dr"
+    .quad variable
+
+#--- test.def
+LIBRARY test.dll
+EXPORTS
+    variable DATA

@llvmbot
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llvmbot commented Oct 27, 2024

@llvm/pr-subscribers-lld

Author: Jacek Caban (cjacek)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/113832.diff

2 Files Affected:

  • (modified) lld/COFF/Chunks.cpp (+7-9)
  • (added) lld/test/COFF/autoimport-arm64ec-data.test (+56)
diff --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index c6986681dffe77..33fb20ffeaf321 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -570,8 +570,7 @@ void SectionChunk::getBaserels(std::vector<Baserel> *res) {
 // another DLL) This returns the size the relocation is supposed to update,
 // in bits, or 0 if the relocation cannot be handled as a runtime pseudo
 // relocation.
-static int getRuntimePseudoRelocSize(uint16_t type,
-                                     llvm::COFF::MachineTypes machine) {
+static int getRuntimePseudoRelocSize(uint16_t type, Triple::ArchType arch) {
   // Relocations that either contain an absolute address, or a plain
   // relative offset, since the runtime pseudo reloc implementation
   // adds 8/16/32/64 bit values to a memory address.
@@ -597,8 +596,8 @@ static int getRuntimePseudoRelocSize(uint16_t type,
   // the image, or temporarily changed at runtime with VirtualProtect.
   // Since this only operates on direct address values, it doesn't work for
   // ARM/ARM64 relocations, other than the plain ADDR32/ADDR64 relocations.
-  switch (machine) {
-  case AMD64:
+  switch (arch) {
+  case Triple::x86_64:
     switch (type) {
     case IMAGE_REL_AMD64_ADDR64:
       return 64;
@@ -613,7 +612,7 @@ static int getRuntimePseudoRelocSize(uint16_t type,
     default:
       return 0;
     }
-  case I386:
+  case Triple::x86:
     switch (type) {
     case IMAGE_REL_I386_DIR32:
     case IMAGE_REL_I386_REL32:
@@ -621,14 +620,14 @@ static int getRuntimePseudoRelocSize(uint16_t type,
     default:
       return 0;
     }
-  case ARMNT:
+  case Triple::thumb:
     switch (type) {
     case IMAGE_REL_ARM_ADDR32:
       return 32;
     default:
       return 0;
     }
-  case ARM64:
+  case Triple::aarch64:
     switch (type) {
     case IMAGE_REL_ARM64_ADDR64:
       return 64;
@@ -661,8 +660,7 @@ void SectionChunk::getRuntimePseudoRelocs(
     // alive. Thus such dangling references in DWARF sections are expected.
     if (!target->getChunk())
       continue;
-    int sizeInBits =
-        getRuntimePseudoRelocSize(rel.Type, file->ctx.config.machine);
+    int sizeInBits = getRuntimePseudoRelocSize(rel.Type, getArch());
     if (sizeInBits == 0) {
       error("unable to automatically import from " + target->getName() +
             " with relocation type " +
diff --git a/lld/test/COFF/autoimport-arm64ec-data.test b/lld/test/COFF/autoimport-arm64ec-data.test
new file mode 100644
index 00000000000000..4d71b55f651a65
--- /dev/null
+++ b/lld/test/COFF/autoimport-arm64ec-data.test
@@ -0,0 +1,56 @@
+# REQUIRES: aarch64, x86
+RUN: split-file %s %t.dir && cd %t.dir
+
+RUN: llvm-lib -machine:arm64ec -out:libtest.a -def:test.def
+RUN: llvm-mc -triple=arm64ec-windows-gnu arm64ec.s -filetype=obj -o arm64ec.obj
+RUN: llvm-mc -triple=arm64ec-windows-gnu x86_64.s -filetype=obj -o x86_64.obj
+
+RUN: lld-link -machine:arm64ec -out:out.dll -dll -noentry x86_64.obj arm64ec.obj libtest.a -lldmingw
+
+RUN: llvm-readobj --coff-imports out.dll | FileCheck -check-prefix=IMPORTS %s
+RUN: llvm-objdump -s out.dll | FileCheck --check-prefix=CONTENTS %s
+
+IMPORTS:      Import {
+IMPORTS-NEXT:   Name: test.dll
+IMPORTS-NEXT:   ImportLookupTableRVA: 0x40E0
+IMPORTS-NEXT:   ImportAddressTableRVA: 0x3000
+IMPORTS-NEXT:   Symbol: variable (0)
+IMPORTS-NEXT: }
+
+Runtime pseudo relocation list header at 0x401c, consisting of 0x0, 0x0, 0x1.
+The first runtime pseudo relocation is from an x86_64 object file, with import
+from 0x3000, applied at 0x7000 with a size of 32 bits. The second pseudo
+relocation is from an ARM64EC object file, with import from 0x3000, applied
+at 0x7008 with a size of 32 bits.
+
+CONTENTS: Contents of section .rdata:
+CONTENTS:  180004010 00200000 10200000 00200000 00000000
+CONTENTS:  180004020 00000000 01000000 00300000 00700000
+CONTENTS:  180004030 40000000 00300000 08700000 40000000
+
+CONTENTS:      Contents of section .test:
+CONTENTS-NEXT:  180007000 00300080 01000000 00300080 01000000
+CONTENTS-NEXT:  180007010 1c400080 01000000 40400080 01000000
+
+#--- arm64ec.s
+    .text
+    .global "#_pei386_runtime_relocator"
+"#_pei386_runtime_relocator":
+    ret
+
+    .weak_anti_dep _pei386_runtime_relocator
+.set _pei386_runtime_relocator,"#_pei386_runtime_relocator"
+
+    .section .test,"dr"
+    .quad variable
+    .quad __RUNTIME_PSEUDO_RELOC_LIST__
+    .quad __RUNTIME_PSEUDO_RELOC_LIST_END__
+
+#--- x86_64.s
+    .section .test,"dr"
+    .quad variable
+
+#--- test.def
+LIBRARY test.dll
+EXPORTS
+    variable DATA

mstorsjo
mstorsjo approved these changes Oct 27, 2024
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LGTM

@cjacek cjacek merged commit 31a6dbe into llvm:main Oct 28, 2024
12 checks passed
@cjacek cjacek deleted the arm64ec-pseudo-relocs branch October 28, 2024 17:44
NoumanAmir657 pushed a commit to NoumanAmir657/llvm-project that referenced this pull request Nov 4, 2024
@cjacek @NoumanAmir657
[LLD][COFF] Add Support for ARM64EC pseudo relocations (llvm#113832)
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